Dr. Shankar’s current research interests are on Mobile Systems, System Complexity, Semantic Web, Engineering Design Productivity, Systems Integration, and Concurrency Modeling. Current collaborations are with faculty members and students in the following colleges: Arts & Letters, Business, Education, Engineering, and Urban Planning, all within FAU, with campuses in Palm Beach county and Broward county in FL, and Drs. Steve Hecht, Nova University, and Miguel Alonso, Miami Dade College, both in Miami, FL. The collaboration centers around the concept of CUSP. The collaboration also involves several companies who are members of MTC (Mobile Technology Consortium) in S. Florida. Our work on systems integration and engineering design productivity was funded by Motorola’s Cell Phone Division for a total of $1.1 M during 2003-2008. The funding was continued by SBA (small business administration) in 2009, at $123K. For more on the collaboration with Motorola, please see our CSI site. A flow developed for academics from this research project enabled us to ramp up course sequences in three leading edge areas (Android. Robotics, and Semantic Web) that now effectively integrate efforts by graduate students (on component development), undergraduate students (on prototype development), and high school students (on marketable creative App development). We also believe that this enhances interest in STEM – we have been able to attract a diverse body of students from 10+ local high schools. All this is documented at our course sites for Android, Robotics, and Semantic Web. We have also applied the concepts developed in our Motorola collaboration to build an applied research focus on design productivity. Component development in the graduate course work involves open source tools and languages (Eclipse, EMF, Jena, Protege, Android, OWL, Lucene, etc.,). Such work is also documented at these sites.
Dr Shankar’s research interests have also spanned the following areas over the years: SoC (System-on-a-chip) Design, VLSI (analog, digital and neural) Design, Computer Architecture, Distributed Parallel Processing, MEMS, and Biomedical Engineering. The VLSI and EDA research areas had funding from Motorola Paging, IBM, Harris, Cadence, and NSF. The Biomedical area had funding from Vasocor Inc., and FHTIC (Florida High Tech and Industry Council), and was performed in collaboration with the University of Wisconsin, Madison, WI, and Wake Forest University, Winston-Salem, NC. A total of 5 patents (2 in the computer engineering area and 3 in the biomedical engineering area) have been issued to Dr. Shankar based on this stage of research. Total Funding from industry and federal sources during this stage of research: about $3.2 M.
Theses (MS) Supervised
Islam, S., A Modeling Methodology for an RTOS, May 2007
Jain, A., Software Decomposition for Multicore Architectures, May 2006
Jillellamudi, H., “Modeling Multiple Abstraction Levels in SoC Using SystemC,” December 2003
Ajmera, A., “High Speed Scaleable Multiplier,” December 2003
Karnati, R., “Survey of Design Techniques for Signal Integrity,” December 2003
Reddy, J., “ Model to analyze interferences to a Bluetooth system,” May 2001.
Mandadi, S., “Operating System on a Chip: Implementation of Interprocess Communication,” August 2000
VLSI and EDA:
Riches, J., “Sigma -Delta Modulation, Low Power”, with Dr. Erdol (Co-Advisor), April 1999
Renavikar, A., “VLSI-Implementation of a Digit Classifier”, July 1996
Madabushi, V., “A CCD-Array for Character Recognition”, March 1995
Banuru, P., “FPGA (XILINX) Implementation of Feature Extraction Algorithm”, Dec. 1994
Phadnis, M., “VHDL Modeling of a Character Recognition System”, Dec. 1994
Du, J., “WSI for Alopex: Design and Test”, April 1994
Xiao, Kang, “DCVS Logic Synthesis,” Co-Advisor, December 1992.
Martin, G., “Character Recognition with Alopex”, August 1992
Zhang, W., “VLSI-Implementation of a Parallel Thinning Algorithm”, August 1992.
Bidari, R., “68000 Microprocessor-based System for Digit Recognition”, August 1992
Freytag, L., “HDL Simulation and Digital Implementation of Alopex Neural Network,” December 1990.
Pesulima, E.E., “Digital VLSI Implementation Issues of Artificial Neural Networks, August 1990.
Urso, A., “High S/N Ration Impedance Plethysmograph,” May 199
Hernandez, L. “A Microprocessor Based Drug Infusion Control System,” Dec 1987.
Cikikci, I., “A Data Acquisition and Processing System for the Study of Peripheral Vascular System,” December 1986.
Chenthankij, A., “Digital PCM MF Receiver,” May 1987.
Given, R.E., “A VLSI NMOS Implementation of a Building Block Processor using CORDIC Algorithms”, August 1985.
Poenateetai, V., “Semi-Custom Design of Microprogrammed Testable Reduced Instruction Set Computer”, April 1985.
Wissinger, F., Infrastructure to model complex systems – hydrological modeling, expected to graduate in May 2013
Islam, S., Diabetes management as a semantic web application, PhD exam to be taken in fall 2012; expected to graduate in Dec 201
Agarwal, A., QoS Driven Communication Backbone for NOC Based Embedded Systems, December 2006
Suryaprasad, J., “SHINE: An Integrated Environment for Software Hardware, December, 2003.
Callaway, E., “A communication protocol for wireless sensor networks,” May 200
Horvath, E., “VLSI Placement,” August 1992.
Kolluri, S., “Early and Noninvasive Detection of Atherosclerosis,” December 1991
Agba, L.C., “A VLSI-Implementation of Handwritten Digit Recognition Using Artificial Neural Networks,” August 1990.
Karralli, O., “A Very High Performance Neural Network System Architecture Using Grouped Weight Quantization,” December 1989.