Published/Accepted Journal Papers
2021
[J51] H. Seo, P. Sanal, R. Azarderakhsh, “SIKE in 32-bit ARM Processors Based on Redundant Number System for NIST Level-II,” ACM Transactions on Embedded Computing Systems, Vol. 20, No. 3, Article 19. March 2021.
[J50] R. Azarderakhsh, JF. Biasse, R. El Khatib, B. Langenberg, and B. Pring, “Parallelism strategies for the tuneable golden-claw finding problem,” International Journal of Computer Mathematics, Computer Systems Theory, accepted 2021.
[J49] R. El Khatib, R. Azarderakhsh, and M. Mozaffari Kemrani, “High-Performance FPGA Accelerator for SIKE”, IEEE Transactions on Computers, accepted, 2021.
[J48] M. Bisheh Niasar, R. Azarderakhsh, and M. Mozaffari Kermani, “Area-time efficient hardware architecture for signature based on Ed448,” IEEE Transactions on Circuits and Systems II,accepted, 2021.
[J47] J. Kaur, A. Sarker, M. Mozaffari Kermani, and R. Azarderakhsh, “Hardware constructions for error detection in lightweight Welch-Gong (WG)-oriented streamcipher WAGE benchmarked on FPGA,” IEEE Transactions on Emerging Topics in Computing, accepted, 2021.
[J46] J. Kaur, M. Mozaffari Kermani, and R. Azarderakhsh, “Hardware constructions for lightweight cryptographic block cipher QARMA with error detection mechanisms,” IEEE Transactions on Emerging Topics in Computing, accepted, 2021.
[J45] A. Cintas Canto, M. Mozaffari Kermani, and R. Azarderakhsh, “CRC-based error detection constructions for FLT and ITA finite field inversions over GF(2^m),” IEEE Transactions on Very Large Scale Integrated (VLSI) Systems, vol. 29, no. 5, pp. 1033-1037, May 2021.
[J44] A. Sarker, M. Mozaffari Kermani, and R. Azarderakhsh, “Fault detection architectures for inverted binary Ring-LWE construction benchmarked on FPGA,” IEEE Transactions on Circuits and Systems II, vol. 68, no. 4, pp. 1403-1407, Apr. 2021.
[J43] A. Cintas Canto, M. Mozaffari Kermani, and R. Azarderakhsh, “Reliable architectures for composite-field-oriented constructions of McEliece post-quantum cryptography on FPGA,” IEEE Transactions on Computer-Aided Design Integr. Circuits Syst., vol. 40, no. 5, pp. 999-1003, May 2021.
[J42] A. Sarker, M. Mozaffari Kermani, and R. Azarderakhsh, “Error detection architectures for ring polynomial multiplication and modular reduction of Ring-LWE in Z=pZ[x]/xn+1 benchmarked on ASIC,”IEEE Transactions on Reliability, vol. 70, no. 1, pp. 362-370, Mar. 2021.
[J41] A. Cintas Canto, M. Kermani, R. Azarderakhsh, “Reliable CRC-Based Error Detection Constructions for Finite Field Multipliers With Applications in Cryptography”, IEEE Trans. Very Large Scale Integr. Syst. vol. 29, no. 1, pp. 232-236, Jan. 2021.
2020
[J40] H. Seo, P. Sanal, A. Jalali, and R. Azarderakhsh, “Optimized Implementation of SIKE Round 2 on 64-bit ARM Cortex-A Processors” in IEEE Transactions on Circuits and Systems I (TCAS-I), vol. 67, no. 8, pp. 2659-2671, Aug. 2020.
[J39] Zh. Liu, R. Azarderakhsh and H. Kim, H. Seo, “Efficient Software Implementation of Ring-LWE Encryption on IoT Processors“, IEEE Transactions on Computer (TC), Special Section on New Trends in RFID and IoT Security, vol. 69, no. 10, pp. 1424-1433, 20120. [pdf]
[J38] B. Koziel, A. Ackie, R. El Khatib, Reza Azarderakhsh, M. Kermani, “SIKE’d Up: Fast Hardware Architectures for Supersingular Isogeny Key Encapsulation“, IEEE Transactions on Circuits and Systems I (TCAS-I). vol. 67, no. 12, pp. 4842-4854, Dec. 2020.
2019
[J37] A. Jalali, R. Azarderakhsh, M. Mozaffari Kermani, M. Campagna, and D. Jao, “ARMv8 SIKE: Optimized supersingular isogeny key encapsulation on ARMv8 processors,“IEEE Transactions on Circuits and Systems I (TCAS-I), vol. 66, no. 11, pp. 4209-4218, October 2019.
[J36] A. Jalali, R. Azarderakhsh, M. Mozaffari Kermani, D. Jao, “Supersingular Isogeny Diffie-Hellman Key Exchange on 64-bit ARM”, IEEE Transactions on Dependable and Secure Computing (TDSC), vol. 16, no. 5, pp. 902-912, Sept. 2019. [pdf]
[J35] M. Mozaffari Kermani and R. Azarderakhsh, “Reliable architecture-oblivious error detection schemes for secure cryptographic GCM structures,”IEEE Transactions on Reliability, Vol. 68, no. 4, pp. 1347-1355 , Aug. 2019.
[J34] A. Sarker, M. Mozaffari Kermani, and R. Azarderakhsh, “Hardware constructions for error detection of number-theoretic transform utilized in secure cryptographic architectures,”IEEE Transactions on Very Large Scale Integrated (VLSI) Systems, vol. 27, no. 3, pp. 738-741, Mar. 2019.
2018
[J33] B. Koziel, R. Azarderakhsh, M. Mozaffari Kermani, “A High-Performance and Scalable Hardware Architecture for Isogeny-Based Cryptography”, IEEE Transactions on Computer (TC) Special Section on Cryptographic Engineering in a Post-Quantum World, vol. 67, no. 11, pp. 1594-1609, 2018. [pdf]
[J32] M. Mozaffari Kermani, R. Azarderakhsh, A. Sarker, and A. Jalali, “Efficient and reliable error detection architectures of Hash-Counter-Hash tweakable enciphering schemes,” ACM Trans. Embedded Comput. Syst., vol. 17, no. 2, pp. 54:1-54:19, 2018. [pdf]
[J31] M. Mozaffari Kermani, A. Jalali, R. Azarderakhsh, J. Xie, and R. Choo, “Reliable inversion in GF(2^8) with redundant arithmetic for secure error detection of cryptographic architectures,” IEEE Transactions in Computer Aided Design Integrated Circuits Systems, vol. 37, no. 3, pp. 696-704, 2018. [pdf]
[J30] A. Aghaie, M. Mozaffari Kermani, and R. Azarderakhsh, “Reliable and fault diagnosis architectures for hardware and software-efficient block cipher KLEIN benchmarked on FPGA,”IEEE Transactions in Computer Aided Design Integrated Circuits Systems., vol. 37, no. 4, pp. 901-905, 2018. [pdf]
2017
[J29] B. Koziel, R. Azarderakhsh, and M. Mozaffari Kermani, D. Jao, “Post-quantum cryptography on FPGA based on Isogenies on elliptic curves”, IEEE Transactions on Circuits and Systems (TCAS-I), vol. 64, no. 1, pp. 86-99, Jan. 2017. [pdf]
[J28] R. Azarderakhsh, D. Fishbein, G. Grewal, Sh. Hu, D. Jao, P. Longa, and R. Verma, “Fast Software Implementations of Bilinear Pairings”, IEEE Transactions on Dependable and Secure Computing (TDSC), vol. 14, n. 6, pp. 605 – 619, Dec. 2017. [pdf]
[J27] S. Subramanian, M. Mozaffari Kermani, R. Azarderakhsh, and M. Nojoumian, “Reliable hardware architectures for cryptographic block ciphers LED and HIGHT”, IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 36, no. 10, pp. 1750-1758, Oct. 2017. [pdf]
[J26] P. Ahir, M. Mozaffari Kermani, and R. Azarderakhsh, “Lightweight architectures for reliable and fault detection Simon and Speck cryptographic algorithms on FPGA”, ACM Transactions on Embedded Computing Systems, vol. 16, no. 109 , Jul. 2017. [pdf]
[J25] M. Mozaffari Kermani, V. Singh, and R. Azarderakhsh, “Reliable low-latency Viterbi algorithm architectures benchmarked on ASIC and FPGA”, IEEE Transactions on Circuits and Systems (TCAS-I), vol. 64, no. 1, pp. 208-216, Jan. 2017. [pdf]
[J24] P. Chen, S. N. Basha, M. Mozaffari Kermani, R. Azarderakhsh, and J. Xie, “FPGA realization of low register systolic all-one-polynomial multipliers over GF(2^m) and their applications in trinomial multipliers”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 25, no. 2, pp. 725-734, Feb. 2017. [pdf]
[J23] R. Ramadoss, M. Mozaffari Kermani, R. Azarderakhsh, “Reliable Hardware Architectures of CORDIC Algorithm with Fixed-Angle of Rotations”, IEEE Transactions on Circuits and Systems (TCAS-II), in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 64, no. 8, pp. 972-976, August 2017. [pdf]
[J22] A. Aghaie, M. Mozaffari Kermani, and R. Azarderakhsh, “Fault diagnosis schemes for low-energy block cipher Midori benchmarked on FPGA“, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 25, no. 4, pp. 1528-1536, April 2017. [pdf]
[J21] M. Mozaffari Kermani, R. Azarderakhsh, and Anita Aghaie “Fault detection architectures for post-quantum cryptographic stateless hash-based secure signatures benchmarked on ASIC”, ACM Transactions on Embedded Computing Systems (TECS), special issue on Embedded Device Forensics and Security: State of the Art Advances, vol. 16, no. 2, pp. 59:1-59:19, 2017. [pdf]
2015
[J20] M. M. Kermani, R. Azarderakhsh, and Anita Aghaie, “Reliable and error detection architectures of Pomaranch for false-alarm-sensitive cryptographic applications”, IEEE Transactions on VLSI Systems (TVLSI), vol. 23, no. 12, pp. 2804-2812, 2015. [pdf]
[J19] R. Azarderakhsh, M. M. Kermani, S. B. Sarmadi, and C. Lee, “Systolic Gaussian Normal Basis Multiplier Architectures Suitable for High-Performance Applications“, IEEE Transactions on VLSI Systems (TVLSI), vol. 23, no. 9, pp. 1969-1972, 2015. [pdf]
[J18] R. Azarderakhsh, M. M. Kermani, and K. Jarvinen, “Efficient Architectures for Single Exponentiation Using Hybrid-Double Multipliers Suitable for High-Performance Cryptographic Applications“, IEEE Transactions on Computer Aided Design Integrated Circuits Systems (TCAD), vol. 34, no. 3, pp. 332-340, 2015. [pdf]
[J17] R. Azarderakhsh, M. M. Kermani, “High-performance two-dimensional finite field multiplication and exponentiation for cryptographic applications“, IEEE Transactions on Computer Aided Design Integrated Circuits Systems (TCAD), vol. 34, no. 10, pp. 1-8, 2015. [pdf]
[J16] R. Azarderakhsh, D. Jao, and H. Lee, “Space Complexity Reduction Algorithms for Gaussian Normal Bais Multiplication“, IEEE Transactions on Information Theory (TIF), vol. 61, no. 5,pp. 2357-2369, 2015. [pdf]
[J15] K. Jarvinen, V. Dimitrov, and R. Azarderakhsh, “A Generalization of Addition Chains and Fast Inversions in Binary Fields“, IEEE Transactions on Computers, vol. 64, no. 9, pp. 2421-2432, 2015. [pdf]
[J14] M. M. Kermani, N. Manoharan, and R. Azarderakhsh, “Reliable radix-4 complex division for fault-sensitive applications“, IEEE Transactions on Computer-Aided Design Integrated Circuits Systems (TCAD), vol. 43, no. 4, pp. 656-667, 2015. [pdf]
[J13] R. Azarderakhsh and A. Reyhani-Masoleh, “Parallel and High-Speed Computations of Elliptic Curve Cryptography Using Hybrid-Double Multipliers“, IEEE Transactions on Parallel and Distributed Systems (TPDS), vol. 26, no. 6, pp. 1668-1677, 2015. [pdf]
2014
[J12] M. M. Kermani, Kai Tian, R. Azarderakhsh, and S. B. Sarmadi, “Fault-Resilient Lightweight Cryptographic Block Ciphers for Secure Embedded Systems“, IEEE Embedded Systems, vol. 6, no. 4, pp. 89-92, 2014. [pdf]
[J11] R. Azarderakhsh and K. Karabina, “A New Double Point Multiplication Algorithm and its Application to Binary Elliptic Curves with Endomorphisms“, IEEE Transactions on Computers, vol. 63, no. 10, pp. 2614-2619, 2014. [pdf]
[J10] R. Azarderakhsh, K. Jarvinen, and M. M. Kermani, “Efficient Algorithm and Architecture for Elliptic Curve Cryptography for Extremely Constrained Secure Applications“, IEEE Transactions on Circuits and Systems (TCAS-I), vol. 61-I, no. 4, pp. 1144-1155, 2014. [pdf]
[J9] R. Azarderakhsh, K. Jarvinen, and V. Dimitrov, “Fast Inversion in GF(2^{m}) with Normal Basis Using Hybrid-Double Multipliers“, IEEE Transactions on Computers, vol. 63, no. 4, pp. 1041-1047, 2014. [pdf]
[J8] J. Pan, R. Azarderakhsh, M. M. Kermani, C. Lee, C. Chiou, and J. Lin, “Low-Latency Digit-Serial Systolic Double Basis Multiplier over GF(2^{m}) Using Subquadratic Toeplitz Matrix-Vector Product Approach“, IEEE Transactions on Computers, vol. 63, no. 5, pp. 1169-1181, May 2014. [pdf]
[J7] M. M. Kermani, R. Azarderakhsh, C. Lee, and S. B. Sarmadi, “Reliable Concurrent Error Detection Architectures for Extended Euclidean-based Division over GF(2^{m}) Using Dual Multiple Parity Prediction Schemes“, IEEE Transactions on VLSI Systems (TVLSI), vol. 22, no. 5, pp. 995-1003, May 2014. [pdf]
[J6] S. B. Sarmadi, M. M. Kermani, R. Azarderakhsh, and C. Lee “Dual Basis Super-Serial Multipliers for Secure Applications and Lightweight Cryptographic Architectures“, IEEE Transactions on Circuit and Systems (TCAS-II), vol. 61, no. 2, pp. 125-129, 2014. [pdf]
2013
[J5] R. Azarderakhsh and A. Reyhani-Masoleh, “High-Performance Implementation of Point Multiplication on Koblitz Curves“, IEEE Transactions on Circuits and Systems (TCAS-II), vol. 60, no. 1, pp. 41-45, 2013. [pdf]
[J4] R. Azarderakhsh and A. Reyhani-Masoleh, “Low Complexity Multiplier Architectures for Single and Hybrid-Double Multiplications in Gaussian Normal Bases“, IEEE Transactions on Computers, vol. 62, no. 4, pp. 744-757, April 2013. [pdf]
[J3] M. M. Kermani and R. Azarderakhsh, “Efficient Fault Diagnosis Schemes for Reliable Lightweight Cryptographic ISO/IEC Standard CLEFIA Benchmarked on ASIC and FPGA“, IEEE Transactions on Industrial Electronics (TIE), vol. 60, no. 12, pp. 5925-5932, 2013. [pdf]
2012
[J2] R. Azarderakhsh and A. Reyhani-Masoleh, “Efficient FPGA Implementations of Point Multiplication on Binary Edwards and Generalized Hessian Curves Using Gaussian Normal Basis“, IEEE Transactions on VLSI Systems (TVLSI), Vol. 20, No. 8, pp. 1453-1466, August 2012. [pdf]
2011
[J1] R. Azarderakhsh and A. Reyhani-Masoleh, “Secure Clustering and Symmetric Key Establishments in Heterogeneous Wireless Sensor Networks”, EURASIP Journal on Wireless Communication and Networking (JWCN), Special Issue on Security and Resiliency for Smart Devices and Applications, Article ID 893592, 12 pages, 2011. [pdf]
Editorials
[E2] K.-K. R. Choo, M. Mozaffari Kermani, R. Azarderakhsh, and M. Govindarasu, “Guest Editorial: Introduction to the Special Issue on Emerging Embedded and Cyber Physical System Security Challenges and Innovations“, IEEE Transactions on Dependable and Secure Computing, 2017
[E1] M. Mozaffari Kermani, R. Azarderakhsh, K. Ren, and J.-L. Beuchat, “Guest Editorial: Introduction to the Special Issue on Emerging Security Trends for Biomedical Computations, Devices, and Infrastructures”, IEEE/ACM Transactions on Computational Biology and Bioinformatics (TCBB), vol. 13, no. 3, pp. 399-400, June 2016.
Refereed Conference Papers
2021
[C49] M. Bisheh Niasar, R. Azarderakhsh, M. Kermani, “High-Speed NTT-based Polynomial Multiplication Accelerator for Post-Quantum Cryptography,” ARITH 2021, to appear.
[C48] R. El khatib, R. Azarderakhsh and M. Mozaffari Kermani, “RISC-V Accelerator for SIKE,” ARITH 2021, to appear.
2020
[C47] M. Bisheh Niasar, R. Azarderakhsh, M. Kermani, “Efficient Hardware Implementations for Elliptic Curve Cryptography over Curve448”. INDOCRYPT 2020, pp. 228-247, 2020.
[C46] M. Bishe Niasar, R. Elkhatib, R. Azarderakhsh, M. Mozaffari Kermani, “Fast, Small, and Area-Time Efficient Architectures for Key-Exchange on Curve25519”, the 27th IEEE International Symposium on Computer Arithmetic, ARITH 2020, pp. 72-79, 2020.
[C45] R. El khatib, R. Azarderakhsh and M. Mozaffari Kermani, “Isogeny-Based Post-Quantum Cryptography in Hardware: Speed Record for SIKE in FPGA”, the 27th IEEE International Symposium on Computer Arithmetic, ARITH 2020, pp. 64-71, 2020.
[C44] A. Hutchinson, J. LeGrow, B. Koziel and R. Azarderakhsh, “Further Optimizations of CSIDH: A Systematic Approach to Efficient Strategies, Permutations, and Bound Vectors“, In Proc. In Proc. 18th International Conference on Applied Cryptography and Network Security, ACNS 2020, pp. 481-501, 2020.
[C43] R. Azarderakhsh, D. Jao, B. Koziel, J. LeGrow, V. Soukharev, O. Taraskin, “How Not to Create an Isogeny-Based PAKE“. In Proc. 18th International Conference on Applied Cryptography and Network Security, ACNS 2020, pp. 169-186, 2020.
2019
[C42] H. Seo, A. Jalali, and R. Azarderakhsh, “SIKE Round 2 Speed Record on ARM Cortex-M4” in Proc. Conf. Cryptology and Network Security, CANS 2019, pp. 39-60, 2019. [Best Paper Award]
[C41] X. Xu, Ch. Leonardi, A. Teh, D. Jao, K. Wang, W. Yu and R. Azarderakhsh, “Improved Digital Signatures Based on Elliptic Curve Endomorphism Rings“, in Proc. The 15th International Conference on Information Security Practice and Experience, ISPEC 2019, pp. 293-309, 2019.
[C40] R. El Khatib, R. Azarderakhsh and M. Mozaffari Kermani, “Optimized Algorithms and Architectures for Montgomery Multiplication for Post-Quantum Cryptography“, in Proc. Conf. Cryptology and Network Security, CANS 2019, pp.83-98, 2019.
[C39] H. Seo, A. Jalali, and R. Azarderakhsh, “Optimized SIKE Round 2 on 64-bit ARM” in Proc. 20th World Conference on Information Security Applications WISA 2019, pp. 341-353, 2019.
[C38] A. Jalali, R. Azarderakhsh, M. Mozaffari Kermani, and D. Jao, “Towards optimized and constant-time CSIDH on embedded devices,” in Proc. Constructive Side-Channel Analysis and Secure Design, COSADE 2019, pp. 215-231, Apr. 2019.
[C37] M. Mozaffari Kermani, S. Bayat-Sarmadi, A-Bon Ackie, and R. Azarderakhsh, “High-performance fault diagnosis schemes for efficient hash algorithm BLAKE,” in Proc. IEEE Latin American Symp. Circuits and Systems LASCAS 2019, pp. 201-204, Feb. 2019.
2018
[C36] R. Azarderakhsh, D. Jao, B. Koziel, and E. Bakos Lang, “EdSIDH: Supersingular Isogeny Diffie-Hellman Key Exchange on Edwards Curves,” inProc. Int. Conf. Security, Privacy, and Applied Cryptography Engineering, SPACE 2018, pp. 125-141, Dec. 2018.
[C35] A. Jalali, R. Azarderakhsh, and M. Mozaffari Kermani, “NEON SIKE: Supersingular isogeny key encapsulation on ARMv7,” in Proc. Int. Conf. Security, Privacy, and Applied Cryptography Engineering, SPACE 2018, pp. 37-51, Dec. 2018.
[C34] A. Aghaie, M. Mozaffari Kermani, and R. Azarderakhsh, “Design-for-error-detection in implementations of cryptographic nonlinear substitution boxes benchmarked on ASIC,” in Proc. IEEE Int. Midwest Symp. on Circuits and Systems, MWSCAS 2018, pp. 574-577, Aug. 2018.
[C33] M. Mozaffari Kermani, A. Jalali, and R. Azarderakhsh, “Lightweight error detection architectures through swapping the shares for a subset of S-Boxes,” in Proc. IEEE Int. Midwest Symp. on Circuits and Systems, MWSCAS 2018, pp. 578-581, Aug. 2018.
[C32] B. Koziel, R. Azarderakhsh and D. Jao, “An Exposure Model for Supersingular Isogeny Diffie-Hellman Key Exchange”, in Proc. CT-RSA 2018, LNCS vol. 10808, pp. 452-469, 2018. [pdf]
[C31] A. Aghaie, M. Mozaffari Kermani, and R. Azarderakhsh, “Comparative realization of error detection schemes for implementations of MixColumns in lightweight cryptography,” in Proc. ACM Conf. Computing Frontiers, CF 2018, pp. 200-203, May 2018. [pdf]
[C30] M. Mozaffari Kermani, R. Azarderakhsh, and S. Bayat-Sarmadi, “Reliable hardware architectures for efficient secure hash functions ECHO and Fugue,” in Proc. ACM Conf. Computing Frontiers, CF 2018, pp. 204-207, May 2018. [pdf]
2017
[C29] D. Aranha, R. Azarderakhsh, K. Karabina, “Efficient Software implementation of laddering algorithms over binary elliptic curves”, in Proc., SPACE 2017, LNCS vol. 10662, pp. 74-92, 2017. [pdf]
[C28] B. Koziel, R. Azarderakhsh and D. Jao, “Side-Channel Attacks on Quantum-Resistant Supersingular Isogeny Diffie-Hellman“, in Proc. SAC 2017, LNCS vo.10719, pp. 64-81, 2017. [pdf]
[C27] A. Jalali, R. Azarderakhsh and M. Mozaffari-Kermani, ‘Efficient Post-Quantum Undeniable Signature on 64-bit ARM‘, in Proc. SAC 2017, LNCS vo.10719, pp. 281-298, 2017. [pdf]
[C26] R. Azarderakhsh, D. Jao and Ch. Leonardi, “Post-quantum static-static key agreement using multiple protocol instances“, in Proc. SAC 2017, LNCS vo.10719, pp. 45-63, 2017. [pdf]
[C25] Y. Yoo, R. Azarderakhsh, A. Jalali, D. Jao, V. Soukharev, “A Post-Quantum Digital Signature Scheme based on Supersingular Isogenies”, in Proc. Financial Cryptography FC 2017, LNCS vol. 10322, pp. 163-181, 2017. [pdf]
2016
[C24] B. Koziel, R. Azarderakhsh, D. Jao and M. Mozaffari Kermani, “On Fast Calculation of Addition Chains for Isogeny-Based Cryptography”, in Proc. Inscrypt 2016, pp.334-347, 2016. [pdf]
[C23] Zh. Liu, R. Azarderakhsh and H. Kim, H. Seo, “Efficient Implementation of Ring-LWE Encryption on High-end IoT Platform”, in Proc. RFIDSec 2016, pp. 76-90, LNCS, vol. 10155, 2016. [pdf]
[C22] B. Koziel, R. Azarderakhsh, and M. Mozaffari Kermani, “Fast Hardware Architectures for Supersingular Isogeny Diffie-Hellman Key Exchange on FPGA”, in Proc. IndoCrypt 2016, pp. 1-6, 2016. [pdf]
[C21] K. Järvinen; A. Miele, R. Azarderakhsh, P. Longa, “FourQ on FPGA: New Hardware Speed Records for Elliptic Curve Cryptography over Prime Fields”, in Proc. CHES 2016, pp. 517-537, LNCS, vol. 9813, Aug. 2016. [pdf]
[C20] B. Koziel, R. Azarderakhsh, A. Jalali, D. Jao, and M. Mozaffari Kermani, “NEON-SIDH: Efficient implementation of supersingular isogeny Diffie-Hellman key exchange protocol on ARM”, in Proc. Conf. Cryptology and Network Security, CANS 2016, pp 88-103 in 2016. [pdf]
[C19] M. Mozaffari Kermani, R. Azarderakhsh, and J. Xie, “Error detection reliable architectures of Camellia block cipher applicable to different variants of its substitution boxes”, in Proc. AsianHOST 2016, pp. 1-6 2016. [pdf]
[C18] R. Azarderakhsh, D. Jao, K. Kalach, B. Koziel and Ch. Leonardi, “Key compression for isogeny-based cryptosystems”, in Proc. AsiaPKC 2016, pp. 1-10, ACM, Jun. 2016. [pdf]
[C17] M. Mozaffari Kermani and R. Azarderakhsh, “Lightweight Hardware Architectures for Fault Diagnosis Schemes of Efficiently-Maskable Cryptographic Substitution Boxes”, in Proc. IEEE Int. Conf. ICECS 2016, pp. 764-767r 2016. [pdf]
[C16] A. Aghaei, M. Mozaffari Kermani, R. Azarderakhsh, “Fault Diagnosis Schemes for Secure Lightweight Cryptographic Block Cipher Rectangle Benchmarked on FPGA”, in Proc. IEEE Int. Conf. ICECS 2016, pp. 768-771, 2016. [pdf]
[C15] M. Mozaffari Kermani, R. Azarderakhsh, and Mehdi Mirakhorli, “Multidisciplinary approaches and challenges in integrating emerging medical devices security research and education”, in Proc. Conf. American Society for Engineering Education, ASEE 2016, pp. 1-13, June 2016. [pdf]
[C14] M. Mozaffari Kermani, R. Ramadoss, and R. Azarderakhsh, “Efficient error detection architectures for CORDIC through recomputing with encoded operands”, in Proc. ISCAS 2016, pp. 2154-2157, May. 2016. [pdf]
[C13] R. Azarderakhsh and K. Karabina, “Efficient Algorithms and Architectures for the Computation of Double Point Multiplication on Elliptic Curves”, in Proc. Third ACM workshop on Cryptography and Security in Computing Systems, CS2@HiPEAC 2016, ACM, pp.25-30, Jan. 2016. [pdf]
2015
[C12] B. Koziel, R. Azarderakhsh, and M. Mozaffari Kermani, “Low-resource and fast binary Edwards curves cryptography using Gaussian normal basis”, in Proc. IndoCrypt 2015, pp. 347-369, Dec. 2015. [pdf]
[C11] M. Mozaffari Kermani and R. Azarderakhsh, “Integrating emerging cryptographic engineering research and security education”, in Proc. Conf. American Society for Engineering Education, ASEE 2015, pp. 1-13, June 2015. [pdf]
[C10] M. Mozaffari Kermani and R. Azarderakhsh, “Reliable hash trees for post-quantum stateless cryptographic hash-based signatures”, in Proc. IEEE Int. Symp. Defect and Fault Tolerance in VLSI Systems, DFT 2015, pp. 325-331, Oct. 2015. [pdf]
2005-2012
[C9] G. Grewal, R. Azarderakhsh, P. Longa, Sh. Hu, and David Jao, “Efficient Implementation of Bilinear Pairings on ARM Processors”, a chapter in proceedings of International Conference on Selected Areas in Cryptography, SAC 2012, LNCS 7707, Pages: 149-165, 2012. [pdf]
[C8] R. Azarderakhsh and A. Reyhani-Masoleh, “A Modified Low Complexity Digit-Level Gaussian Normal Basis Multiplier”, a chapter in proceedings of 3rd International Workshop on the Arithmetic of Finite Fields, WAIFI 2010, LNCS 6087, Pages: 25-40, 27-30 Jun. 2010. [pdf]
[C7] R. Azarderakhsh and A. Reyhani-Masoleh, and Z. Abid, “A Key Management Scheme for Cluster Based Wireless Sensor Networks”, in proceedings of IEEE/IFIP International Conference on Embedded and Ubiquitous Computing, EUC 2008, Volume 2, Pages: 222–227, 17-20 Dec. 2008. [pdf]
[C6] X. Yuan, H. Jürgensen, R. Azarderakhsh, and A. Reyhani-Masoleh, “Key Management for Wireless Sensor Networks Using Trusted Neighbors”, in proceedings of IEEE/IFIP International Conference on Embedded and Ubiquitous Computing, EUC 2008, Volume 2, Pages: 228-233,17-20 Dec. 2008. [pdf]
[C5] A. R. Masoum, A. H. Jahangir, Z. Taghikhaki, R. Azarderakhsh, “A New Multi Level Clustering Model to Increase Lifetime in Wireless Sensor Networks”, in proceedings of the 2nd IEEE International Conference on Sensor Technologies and Applications, SENSORCOMM 2008, Pages: 185-190, 25-31 Aug. 2008. [pdf]
[C4] R. Azarderakhsh, A. H. Jahangir, and M. Keshtgary, “Network Survivability Performance Evaluation in Wireless Sensor Networks”, in proceedings of the 11th International CSI Computer Conference, CSI 2006, Pages: 567-570, 24-26 Jan. 2006.
[C3] R. Azarderakhsh, A. H. Jahangir and M. Keshtgary, “A New Virtual Backbone for Wireless Ad Hoc Sensor Network with Connected Dominating Set”, in proceedings of the 3rd IFIP Annual Conference on Wireless On demand Network Systems and Services, WONS 2006, Pages: 191-195, 18-20 Jan. 2006.
[C2] R. Azarderakhsh, A. H. Jahangir, “Optimized Routing Algorithms for Efficient Power Consumption in Wireless Sensor Networks“, in proceedings of 13th International Electrical Engineering Conference, IEEC 2005, Pages 178-183, Apr. 2005.
[C1] R. Azarderakhsh, S.Gh. Miremadi, Gh. Moradi, “Dependability Model of Flight Safety Management Systems”, in proceedings of the 1st International Conference on Air Transport Industries Management, ICATIM 2005, Pages: 89-99, 19-20 Jan. 2005.
Book Chapters
[B1] B. Koziel, R. Azarderakhsh, and M. Mozaffari Kermani, “Post-Quantum Cryptographic Hardware and Embedded Systems,” Emerging Topics in Hardware Security, Editor: Mark Tehranipoor, Springer Nature, Mar. 2021.